NON-REFERENCED PREFETCH (NRP) CACHE FOR INSTRUCTION PREFETCHING

A new conceptual cache, NRP (non-referenced prefetch) cache, is propos ed to improve the performance of instruction prefetch mechanisms which try to prefetch both the sequential and nonsequential blocks under th e limited memory bandwidth. The NRP cache is used in storing prefetche d blocks that were not referenced by the CPU, while these blocks were discarded in other previous prefetch mechanisms. By storing the non-re ferenced prefetch blocks in the NRP cache, both cache misses and memor y traffic are reduced. A prefetch method to prefetch both the sequenti al and the nonsequential instruction paths is designed to utilise the effectiveness of the NRP cache. The results from trace-driven simulati on show that this approach provides an improvement in memory access ti me than other prefetch methods. Particularly, the NRP cache is more ef fective in a lookahead prefetch mechanism that can hide longer memory latency. Also, the NRP cache reduces 50 - 112% of the additional memor y traffic required to prefetch both instruction paths. This approach c an achieve both the improved memory access time and the reduced memory traffic as a cost-effective cache design.