NEW COMPLEMENTARY BICMOS DIGITAL GATES FOR LOW-VOLTAGE ENVIRONMENTS

A new generation of complementary BiCMOS digital gates for low-voltage environments will be presented. These include inverters and an AND ga te. These circuits are particularly suitable for the scaled sub-half m icrometer, 1.2 V BiCMOS generation and are designed to give full volta ge swings at relatively high speeds. The number of devices used in the new circuit configuration is, by far, fewer than that in the recently reported circuits. The superiority of the new circuits has been confi rmed by comparing their performance in terms of speed, voltage swing, power dissipation, noise margin and chip area, with the CMOS and that of the recently reported circuits. An analytical transient model for t he basic circuit configuration is presented, and HSPICE simulations ha ve been used to characterize the circuits. The experimental results ob tained from the fabricated chip have also verified the functionality o f the proposed circuit.