APPLICATION OF SCANNING-TUNNELING-MICROSCOPY NANOFABRICATION PROCESS TO SINGLE-ELECTRON TRANSISTOR

Citation
K. Matsumoto et al., APPLICATION OF SCANNING-TUNNELING-MICROSCOPY NANOFABRICATION PROCESS TO SINGLE-ELECTRON TRANSISTOR, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 14(2), 1996, pp. 1331-1335
Citations number
7
Categorie Soggetti
Physics, Applied
ISSN journal
10711023
Volume
14
Issue
2
Year of publication
1996
Pages
1331 - 1335
Database
ISI
SICI code
1071-1023(1996)14:2<1331:AOSNPT>2.0.ZU;2-P
Abstract
The single electron transistor was fabricated by quite a new fabricati on process using scanning tunneling microscopy, The single electron tr ansistor operates at room temperature showing a clear Coulomb staircas e of 150 mV periods. The tip of the scanning tunneling microscope was used as a cathode, and the surface of the Ti layer was oxidized to for m a narrow oxidized Ti line. Using this oxidized Ti line, the island r egion of the single electron transistor was fabricated. The electrical property of the oxidized Ti line was also examined in detail. (C) 199 6 American Vacuum Society.