SIMPLE METHOD FOR THE DETERMINATION OF THE INTERFACE TRAP DENSITY AT 77-K IN FULLY DEPLETED ACCUMULATION MODE SOI MOSFETS

Si-SiO2 interface trap densities have a dominant impact on the electri cal performance of MOS devices and are playing a crucial role in the u nderstanding of the underlying device physics, For bulk MOSFETs a larg e variety of techniques are applicable to determine the interface trap density. Most of them remain valid for low temperature device operati on. For SOI MOSFETs however, transient effects have to be taken into a ccount. This paper discusses a new and simple technique, based on the threshold voltage shift as a function of the operating temperature, to determine the interface trap density in fully depleted accumulation m ode SOI devices operating at cryogenic temperature. The validity of th e technique will be demonstrated for 77 K device operation.