SYNTHESIS OF INITIALIZABLE ASYNCHRONOUS CIRCUITS

We show that existing synthesis techniques may produce asynchronous ci rcuits that are not initializable by gate-level analysis tools even wh en the design is functionally initializable. Due to the absence of any initialization sequence, a fault simulator or test generator that ass umes an unknown starting state will be completely ineffective for thes e circuits, In this paper, we show that proper consideration of initia lizability during the asynchronous circuit synthesis procedure can gua rantee initializable implementations. We show that the assignment of d on't cares during the synthesis procedure affects the initializability of the final implementation, We present a novel implicit enumeration procedure that selectively assigns don't cares to obtain an initializa ble implementation, Initialization sequences are obtained as a by-prod uct of our synthesis procedure.