NEW APPROACH TO MANUFACTURING FIELD EMITTER ARRAYS WITH SUB-HALF-MICRON GATE APERTURES

As an attempt to develop a field emitter array with sub-half-micron ga te openings for low voltage operation, a new fabrication method has be en proposed and demonstrated. The key element of the new process is fo rming the gate insulator by local oxidation of silicon (LOCOS), result ing in the reduction of the gate hole size due to the lateral encroach ment of oxide, ultimately compared with the nitride disc size formed b y a conventional contact printer. Feasibility of scaling down the gate hole size of a field emitter to sub-half-micron has been proved succe ssfully, and the field emitter with a 450 nm diam gate opening has bee n fabricated and characterized. For a 2500-tip array with 450 nm diam gate openings, the anode current of 115 mu A(similar to 50 nA/tip) was measured at the gate voltage of 41 V, while the gate current was less than 0.3% of the anode current. Considering the cathode current level required for flat panel display applications and the measured emissio n characteristics, the fabricated emitter array is expected to operate at a column drive voltage of about 16 V peak-to-peak. (C) 1996 Americ an Vacuum Society.