NOISE IN DMOS TRANSISTORS IN A BICMOS-TECHNOLOGY

An experimental and theoretical study of the 1/f noise and the thermal noise in double-diffused MOS (DMOS) transistors in a BICMOS-technolog y has been carried out. By using an analytical model that consists of an enhancement MOS transistor in series with a depletion MOS transisto r and a resistance, and by attributing noise sources to each device, t he noise in DMOS devices is simulated accurately. Three distinct regio ns of operation are defined: enhancement transistor control, depletion transistor control and the linear region. In the first region, the no ise is strictly determined by the enhancement transistor. It was found that the 1/f noise in this region is caused by mobility fluctuations and is very low, In the depletion transistor control region both trans istors influence the total noise. Here the 1/f noise is dominated by t he depletion transistor. The series resistance is only of importance i n the linear region.