A VERY SMALL BIPOLAR-TRANSISTOR TECHNOLOGY WITH SIDEWALL POLYCIDE BASE ELECTRODE FOR ECL-CMOS LSPS

Citation
T. Shiba et al., A VERY SMALL BIPOLAR-TRANSISTOR TECHNOLOGY WITH SIDEWALL POLYCIDE BASE ELECTRODE FOR ECL-CMOS LSPS, I.E.E.E. transactions on electron devices, 43(9), 1996, pp. 1357-1363
Citations number
13
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
ISSN journal
00189383
Volume
43
Issue
9
Year of publication
1996
Pages
1357 - 1363
Database
ISI
SICI code
0018-9383(1996)43:9<1357:AVSBTW>2.0.ZU;2-M
Abstract
Very small, high-performance, silicon bipolar transistors (SPOTEC) wer e developed for use in ECL-CMOS LSI's, The transistors are fabricated with a sidewall polycide base; chemical vapor deposition is used to se lectively deposit tungsten on the sidewall surface of the polysilicon base, The tungsten is then silicided, This self-aligned polycide techn ology makes a narrow (0.4-mu m wide), low-resistance (7 Omega/square) base electrode possible, Narrow U-groove isolation and narrow collecto r metallization techniques are used to reduce the transistor area to 1 0 mu m(2). A shallow E-B junction and base layer have now been formed by using rapid-vapor-phase doping, The resulting transistors have good I-V characteristics without leakage current or high current gain, The y have a high cut-off frequency of 37 GHz (53 GHz with pedestal collec tor ion implantation and thin epitaxial layer) and small junction capa citances, These transistors will facilitate the development of very-hi gh-speed, high-density ULSI's.