EFFECTS OF ETCH-INDUCED DAMAGE ON THE ELECTRICAL CHARACTERISTICS OF INPLANE GATED QUANTUM-WIRE TRANSISTORS

In-plane gated (IPG) quantum wire transistors were fabricated using dr y etching in a Cl-2/Ar plasma generated with an electron cyclotron res onance source. The electrical characteristics of the IPG transistors w ere correlated with the geometrical dimensions as well as the dry etch ing and passivation conditions. In-plane gates with the width of the c hannel (W-c) and the width of the gate isolation (W-g) ranging from 10 0 to 850 nm were studied. Good held-effect transistor characteristics with transconductances up to 371 mS/mm were obtained on these devices. At a gate-source voltage (V-GS) Of 2 V, the saturated drain-source cu rrent (I-DSAT) increased from 68 to 153 mu A as W-c increased from 440 to 800 nm. No current was measured on IPG transistors with W-c less t han or equal to -130 nm. The quasi-one-dimensional channel can be comp letely pinched off with V-GS less than or equal to -1 V It was found t hat the gate leakage current decreased with a wider W-g and a deeper d epth for the gate isolation. The leakage current at V-GS=2 V decreased significantly from 250 to <0.1 pA when the etch depth increased from 320 to 440 nm. The gate leakage current and I-DS were also found to in crease with rf power used for etching due to additional defects genera ted at higher ion energy. These defects, however, can be passivated wi th low energy chlorine species, and reduction of the gate leakage curr ent from 40 to 4.4 nA was observed after a 1 min Cl-2 plasma passivati on. (C) 1996 American Vacuum Society.