HIGH-MOBILITY STRAINED-SI PMOSFETS

Citation
Dk. Nayak et al., HIGH-MOBILITY STRAINED-SI PMOSFETS, I.E.E.E. transactions on electron devices, 43(10), 1996, pp. 1709-1716
Citations number
15
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
ISSN journal
00189383
Volume
43
Issue
10
Year of publication
1996
Pages
1709 - 1716
Database
ISI
SICI code
0018-9383(1996)43:10<1709:HSP>2.0.ZU;2-C
Abstract
Operation and fabrication of a new high channel-mobility strained-Si P MOSFET are presented. The growth of high-quality strained Si layer on completely relaxed, step-graded, SiGe buffer layer is demonstrated by gas source MBE. The strained-Si layer is characterized by double cryst al X-ray diffraction, photoluminescence, and transmission electron mic roscopy. The operation of a PMOSFET is shown by device simulation and experiment. The high-mobility strained-Si PMOSFET is fabricated on str ained-Si, which is grown epitaxially on a completely relaxed step-grad ed Si0.82Ge0.18 buffer layer on Si(100) substrate. At high vertical fi elds (high \V-g\), the channel mobility of the strained-Si device is f ound to be 40% and 200% higher at 300 K and 77 K, respectively, compar ed to those of the bulk Si device. In the case of the strained-Si devi ce, degradation of channel mobility due to Si/SiO2 interface scatterin g is found to be more pronounced compared to that of the bulk Si devic e. Carrier confinement at the type-II strained-Si/SiGe-buffer interfac es clearly demonstrated from device transconductance and C-V measureme nts at 300 K and 77 K.