INFLUENCE OF PARASITIC STRUCTURES ON THE ESD PERFORMANCE OF A PURE BIPOLAR PROCESS

The purpose of this work is to show that parasitic structures greatly affect the ESD performance of a bipolar process. More especially, the existence of a parasitic diode in parallel to the protection transisto r in the input stages of a pure bipolar IC leads to a low ESD performa nce for HEM stresses, while the ESD performance for MM stresses is hig h. Suppression of this diode significantly increases the ESD performan ce for both types of stresses. Copyright (C) 1996 Elsevier Science Ltd