TURN-ON SPEED OF GROUNDED GATE NMOS ESD PROTECTION TRANSISTORS

Authors
MENEGHESSO G LUCHIES JRM KUPER FG MOUTHAAN AJ
Citation
G. Meneghesso et al., TURN-ON SPEED OF GROUNDED GATE NMOS ESD PROTECTION TRANSISTORS, Microelectronics and reliability, 36(11-12), 1996, pp. 1735-1738
Citations number
7
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
Microelectronics and reliability → ACNP
ISSN journal
00262714
Volume
36
Issue
11-12
Year of publication
1996
Pages
1735 - 1738
Database
ISI
SICI code
0026-2714(1996)36:11-12<1735:TSOGGN>2.0.ZU;2-H
Abstract
The turn-on speed of nMOS transistors (nMOST) is of paramount importan ce for robust Charged Device Model (CDM) protection circuitry. In this paper the nMOST turn-on time has been measured for the first time in the sub-halve nanosecond range with a commercial e-beam tester. The me thod may be used to improve CDM-ESD hardness by investigating the CDM pulse responses within circuit. Furthermore it is shown that the CDM r esults of various protection layouts can be simulated with a SPICE mod el. Copyright (C) 1996 Elsevier Science Ltd