RELIABILITY IMPROVEMENT OF SINGLE-POLY QUASI SELF-ALIGNED BICMOS BJTSUSING BASE SURFACE ARSENIC COMPENSATION

A key issue in modern microelectronics is to improve and optimise devi ce performance and reliability without excessively increasing fabricat ion costs. In this paper we will show how it is possible to improve th e reliability of single-polysilicon quasi self-aligned BJTs of an adva nced 0.5 mu m BiCMOS technology by means of base surface As compensati on without any additional mask. By carefully optimising the process pa rameters it is possible to maintain unchanged the characteristics of t he intrinsic transistor compared to the reference one (without compens ation) with only a slight increase of the parasitic base resistance, a s proven by extensive statistical measurements. Depending on the As do se an increase of the device lifetime by up to four orders of magnitud e can be obtained. Copyright (C) 1996 Elsevier Science Ltd