TECHNOLOGY AND DEVICE SCALING CONSIDERATIONS FOR CMOS IMAGERS

Authors
Citation
Hs. Wong, TECHNOLOGY AND DEVICE SCALING CONSIDERATIONS FOR CMOS IMAGERS, I.E.E.E. transactions on electron devices, 43(12), 1996, pp. 2131-2142
Citations number
73
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
ISSN journal
00189383
Volume
43
Issue
12
Year of publication
1996
Pages
2131 - 2142
Database
ISI
SICI code
0018-9383(1996)43:12<2131:TADSCF>2.0.ZU;2-7
Abstract
This paper presents an analysis of the impact of device and technology scaling on active pixel CMOS image sensors, Using the SIA roadmap as a guideline, we calculate the device characteristics that are germane to the image sensing performance of CMOS imagers, and highlight the ar eas where the CMOS imager technology may need to depart from ''standar d'' CMOS technologies. The impact of scaling on those analog circuit p erformance that pertain to image sensing performances are analyzed, Ou r analyses suggest that while ''standard'' CMOS technologies may provi de adequate imaging performance at the 2-1 mu m generation without any process change, some modifications to the fabrication process and inn ovations of the pixel architecture are needed to enable CMOS to perfor m good quality imaging at the 0.5 mu m technology generation and beyon d. Finally, the challenges to the CMOS imager research community are o utlined.