A SURVEY OF DA TECHNIQUES FOR PLD AND FPGA BASED SYSTEMS

Citation
R. Venkateswaran et P. Mazumder, A SURVEY OF DA TECHNIQUES FOR PLD AND FPGA BASED SYSTEMS, Integration, 17(3), 1994, pp. 191-240
Citations number
37
Categorie Soggetti
System Science","Computer Sciences","Computer Science Hardware & Architecture
Journal title
ISSN journal
01679260
Volume
17
Issue
3
Year of publication
1994
Pages
191 - 240
Database
ISI
SICI code
0167-9260(1994)17:3<191:ASODTF>2.0.ZU;2-#
Abstract
Programmable logic devices (PLDs) are gaining in acceptance, of late, for designing systems of all complexities ranging from glue logic to s pecial purpose parallel machines. Higher densities and integration lev els are made possible by the new breed of complex PLDs and FPGAs. The added complexities of these devices make automatic computer aided tool s indispensable for achieving good performance and a high usable gate- count. In this article, we attempt to present in an unified manner, th e different tools and their underlying algorithms using an example of a vending machine controller as an illustrative example. Topics covere d include logic synthesis for PLDs and FPGAs along with an in-depth su rvey of important technology mapping, partitioning and place and route algorithms for different FPGA architectures.