ARRIVING AT A UNIFIED MODEL FOR HOT-CARRIER DEGRADATION IN MOSFETS THROUGH GATE-TO-DRAIN CAPACITANCE MEASUREMENT

Hot carrier degradation of sub-micron n-channel and p-channel MOSFET's from a CMOS process was investigated using small-signal gate-to-drain capacitance and charge pumping measurements for three different stres s conditions, For both devices the worst case degradation was found to be due to the trapping of majority carriers and the creation of accep tor interface states, mainly in the upper half of the bandgap, It was concluded that the trapping, of carriers and generation of interface s tates are separate processes, The effect of the donor interface states in the lower half of the bandgap necessary to associate the interface states with the p(bo) dangling bond model was not observed. A possibl e cause is suggested.