Two vertical type submicron p-channel depletion mode SIC MOSFETs have
been studied. To produce the first MOSFET a SiC thin film was sputtere
d on a Si substrate at 600 degrees C and annealed at 1300 degrees C fo
r 5 h in Ar atmosphere. For this MOSFET, the current-voltage character
istics of 1.6 and 0.6 mu m channel length have been investigated. In t
his structure, the drain characteristics show an incomplete saturation
because the channel depth is too wide to be depleted. For the other M
OSFET, the SiC thin film is deposited at the sidewall of the SiO2 insu
lator by RF sputtering at 600 degrees C, and a 0.4 mu m channel length
has been developed. This MOSFET shows good saturation characteristics
. Also, this device possesses a drain breakdown voltage beyond 16 V. T
hese experimental results give the foundation for the future developme
nt of submicron SiC power integrated circuit technology.