MODELING, ANALYSIS AND SYNTHESIS OF ASYNCHRONOUS CONTROL-CIRCUITS USING PETRI NETS

In this tutorial paper we survey some of the existing techniques for m odelling, analysis and synthesis of asynchronous control circuits. All these methods are based on the use of Petri nets as a tool for descri bing the behaviour of such circuits. The descriptive power of Petri ne ts allows them to model a wide range of asynchronous circuit component s, whether they are built in the two-phase (micropipeline) or in the f our-phase (logic gate based) design styles. We present three different approaches to verification of net-based models, and show their relati ve strengths and weaknesses. We advocate their complementary applicati on for different classes of Petri nets and the properties verified. Tw o major synthesis approaches are demonstrated using the example of a m odulo-N Up/Down counter. The first one is a combination of Petri net l evel decompositions and syntax-directed translation of nets into circu its. The second one is based on logic synthesis from signal transition graph specifications.