CHARACTERIZATION AND OPTIMIZATION OF THE SIO2 SIC METAL-OXIDE-SEMICONDUCTOR INTERFACE/

The response time of deep-lying interface states in silicon carbide me tal-oxide semiconductor (MOS) capacitors may be thousands of years at room temperature. To accurately measure interface state density beyond about 0.6 eV from the band edge, it is necessary either to raise the temperature well above 300K so that all states can follow changes in D C bias, or to utilize photoexcitation to modulate the interface state population at room temperature. In this paper, we use the hilo capacit ance-voltage technique and the ac conductance technique at elevated te mperatures to characterize the MOS interface of p-type 6H-SiC. We repo rt on the effect of surface cleaning and push/pull rates, and give the first detailed comparison of the effect of aluminum vs boron as the p -type dopant on the MOS interface. Oxides grown on 6H-SiC at 1150 degr ees C in wet O-2 followed by a 30 min insitu argon anneal have fixed c harge densities as low as 9 x 10(11) cm(-2) and interface state densit ies as low as 1.5 x 10(11) cm(-2) eV(-1).