The philosophical and practical differences between Japanese and Ameri
can IC industries concerning VLSI reliability, as well as recent resea
rch topics and new analysis methods such as wafer scale testing are di
scussed. A new challenging approach to VLSI reliability is now greatly
needed in response to the ''paradigm shift'' now being brought about
by simple scaling limitations, increased process complexity, and VLSI
application to advanced systems. A good example of this shift is the n
ew movement from simple failure analysis by sampling the output of a m
anufacturing line to the ''building-in-reliability'' approach. To purs
ue this technique, greater importance will be attached to a deeper phy
sical understanding (including frequent use of Computer Aided Design,
CAD/ Design Automation, DA) of the significant relationships between t
he input variables and product reliability, and to total concurrent en
gineering from research labs to production sites. In addition, distrib
utive duality control management being carried out particularly in Jap
an, where duality improvement is the common concern for every employee
, may be a key factor in overcoming the more difficult reliability pro
blems in the coming giga-scale ICs. Furthermore, fast new VLSI testing
methods and new yield-enhancing redundancy techniques, resulting in c
ost reduction, will be increasingly needed to achieve high reliability
for VLSIs with 10(9) devices on a single chip.