VERY-HIGH-SPEED SILICON BIPOLAR-TRANSISTORS WITH IN-SITU DOPED POLYSILICON EMITTER AND RAPID VAPOR-PHASE DOPING BASE

We present a detailed study of the performance of very-high-speed sili con bipolar transistors with ultra-shallow junctions formed by thermal diffusion, Devices are fabricated with double-polysilicon self-aligne d bipolar technology with U-groove isolation on directly bonded SOI wa fers to reduce the parasitic capacitances, Very thin and low resistivi ty bases are obtained by rapid vapor-phase doping (RVD), which is a va por diffusion technique using a source gas of B2H6. Very shallow emitt ers are formed by in-situ phosphorus doped polysilicon (IDP) emitter t echnology with rapid thermal annealing (RTA), In IDP emitter technolog y, the emitters are formed by diffusion from the in-situ phosphorus do ped amorphous silicon layer. Fabricated transistors are found to have ideal I-V characteristics, large current gain and low emitter resistan ce for a small emitter, Furthermore, a minimum ECL gate delay time of 15 ps is achieved using these key techniques, Analyses of the high per formance using circuit and device simulations indicate that the most e ffective delay components of an ECL gate are cutoff frequency and base resistance, A high cut-off frequency is achieved by reducing the base width and active collector region, In this study, RVD is used to achi eve both high cut-off frequency and low base resistance at the same ti me.