THE CRYOGENIC OPERATION OF PARTIALLY DEPLETED SILICON-ON-INSULATOR INVERTERS

This paper describes the cryogenic operation of inverters fabricated i n a partially depleted (PD) 1 mu m Silicon-on-Insulator (SOI) CMOS tec hnology, As is shown, the floating-body effects like the kink degrade the static transfer characteristics considerably, Generally, the effec ts aggravate upon cooling, Additionally, at deep cryogenic temperature s, e,g., 4.2 K, typical low-temperature anomalies, which are related t o the de,ice freeze-out, cause hysteresis effects, Ways for improvemen t are discussed and compared: As is shown, the PD SOI inverter anomali es can be largely reduced by using the so-called twin-gate configurati on.