AN ARCHITECTURE FOR A DSP FIELD-PROGRAMMABLE GATE ARRAY (VOL 3, PG 136, 1995)

Authors
AGARWALA M BALSARA PT
Citation
M. Agarwala et Pt. Balsara, AN ARCHITECTURE FOR A DSP FIELD-PROGRAMMABLE GATE ARRAY (VOL 3, PG 136, 1995), IEEE transactions on very large scale integration (VLSI) systems, 3(2), 1995, pp. 342-342
Citations number
1
Categorie Soggetti
Computer Sciences","Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture
Journal title
IEEE transactions on very large scale integration (VLSI) systems → ACNP
ISSN journal
10638210
Volume
3
Issue
2
Year of publication
1995
Pages
342 - 342
Database
ISI
SICI code
1063-8210(1995)3:2<342:AAFADF>2.0.ZU;2-4