Spurred by the advent of low-cost, high-speed complementary metal-oxid
e semiconductor (CMOS) devices, the ever-increasing demand for faster,
smaller and cheaper systems, and global competitive pressures, many f
undamental changes are taking place in the microelectronics packaging
industry to better prepare it to meet the challenges of the next mille
nnium for systems ranging from consumer electronics to large systems s
uch as mainframes. With CMOS performance approaching emitter-coupled l
ogic (ECL), CMOS is emerging as the engine of systems that span the en
tire spectrum of the microelectronics industry, fading the demarkation
lines between systems of different form factors, and encroaching on t
he territory of ECL-based mainframes. Partly due to the insatiable des
ire of society for lower-cost systems with high performance, the recen
t past has witnessed a shrinking large-system market and migration tow
ard small systems, as reflected by the widespread use of CMOS-based pe
rsonal systems and portables today. Also evident is the convergence of
computers, radios, phones and videos into one low-cost portable multi
media system possessing eventually all the functions of these equipmen
t to more fully exploit the senses of mankind. Moreover, much attentio
n is being given to thermal/power management and development of low-po
wer submicron CMOS chips even for small systems such as personal compu
ters in response to the rising power dissipation associated with high-
speed CMOS integrated circuits, and the demand for more energy-efficie
nt and environmentally correct systems. To tackle these changes mandat
ing high speed, low cost, portability and low power dissipation, packa
ging needs to take on an evolutionary track for cost-effective solutio
ns based on a plethora of package options in existence today, particul
arly in the areas of enabling technologies such as high-input/output (
I/O) connectors (e.g., flip chip, tape automated bonding, ball grid ar
rays and flexible edge connectors), multichip module (MCM) packaging (
involving, for example, organic cards and both ceramic and silicon-on-
silicon MCMs), high-wiring-capacity organic laminates, as well as effi
cient heat-sinking. This article reviews the present and the future of
these enabling packaging technologies, all favoring a high level of p
ackage integration, maximizing the benefits of integrated circuit (IC)
performance gains through reducing packaging delays, and small packag
e form factors.