CHARACTERISTICS OF IN-SITU DEPOSITED GAAS METAL-INSULATOR-SEMICONDUCTOR STRUCTURES

GaAs based metal-insulator-semiconductor structures utilizing a pseudo morphic Si interface layer were investigated. Deposition involved mole cular beam epitaxy for GaAs and remote plasma enhanced chemical vapor epitaxy for Si and insulator (Si3N4) layers, all without exposure to a ir. As determined by the conductance method, interface trap densities in the upper 10(10) eV(-1) cm(-2) were obtained, with samples withstan ding high temperature rapid thermal annealing. Frequency dispersion an d hysteresis of under 100 mV indicate the quality of the interface and bulk layers. Bulk trap density in the insulator appears to be below 1 0(12) cm(-2). Metal-insulator-semiconductor field-effect-transistors w ere fabricated and investigated. With GaAs channels, excess channel co nduction which vanished at low temperatures was observed. Addition of as low as 5% InAs in the channel eliminated this excess channel curren t. A similar observation was made when a Ge interface layer was grown on GaAs prior to the Si layer. The excess current is attributed to int erfacial traps below the midgap. Transconductances as high as 160 and 170 mS/mm have been obtained with about 2.5 mu m gate length in GaAs a nd InGaAs channels, respectively.