ADVANCED TFT SRAM CELL TECHNOLOGY USING A PHASE-SHIFT LITHOGRAPHY
Citation
T. Yamanaka et al., ADVANCED TFT SRAM CELL TECHNOLOGY USING A PHASE-SHIFT LITHOGRAPHY, I.E.E.E. transactions on electron devices, 42(7), 1995, pp. 1305-1313
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
SICI code
0018-9383(1995)42:7<1305:ATSCTU>2.0.ZU;2-L
Abstract
An advanced TFT memory cell technology has been developed for making h
igh-density and high-speed SRAM cells, The cell is fabricated using a
phase-shift lithography that enables patterns with spaces of less than
0.25 mu m to be made using the conventional stepper, Cell area is als
o reduced by using a small cell-ratio and a parallel layout for the tr
ansistor, Despite the small cell-ratio, stable operation Is assured by
using advanced polysilicon PMOS TFT's for load devices, The effect of
the Si3N4 multilayer gate insulator on the on-current and the influen
ce of the channel implantation are also investigated, To obtain stable
operation and extremely low stand-by power dissipation, a self-aligne
d offset structure for the polysilicon PMOS TFT is proposed and demons
trated, A leakage current of only 2 fA/cell and an on-/off-current rat
io of 4.6 x 10(6) are achieved with this polysilicon PMOS TFT in a mem
ory cell, which is demonstrated in a experimental 1-Mbit CMOS SRAM chi
p that has an access time of only 7 ns.