FAULT-TOLERANT ARITHMETIC UNIT USING DUPLICATION AND RESIDUE CODES

This paper is a study of the practical value of the various approaches , proposed so far, to achieve fault tolerance in arithmetic units usin g the residue code technique and to find the best design in terms of c ost and error coverage. The results have shown that the error correcti on approaches can treat a one-bit error (E = +/- 2(i)) using relativel y small hardware cost and time delay. It is also shown that no more th an a single error, of the one-bit type, can be treated at reasonable c ost using error correction approaches. However, a combination of N-mod ular redundancy (NMR) and residue codes can be used to cover a wide ra nge of errors at considerably lower cost. Here we suggest an approach based on model duplication and residue codes (DAR) which is shown to h ave better error coverage than error correction approaches and lower c ost than both triple modular redundancy (TMR) and error correction app roaches.