SUPPRESSION OF BORON PENETRATION IN BF2-IMPLANTED P-TYPE GATE MOSFET BY TRAPPING OF FLUORINES IN AMORPHOUS GATE

This work reports the use of amorphous/polysilicon gate electrode in B F2-implanted poly-gated P-MOSFET's to suppress the boron penetration, SIMS analysis clearly illustrates that fluorine prefers to accumulate in the layer of amorphous silicon. The retardation of boron diffusion is therefore achieved by the trapping of fluorine in the amorphous lay er of stacked amorphous/polysilicon (SAP) p-type gate due to a lower d iffusion rate of fluorine in the amorphous silicon layer. Polysilicon depletion effect did not become more severe by introducing the amorpho us silicon. In addition, gate oxide reliability is not degraded by usi ng this gate structure. Results show that the structure is a promising gate electrode for future dual-poly gate CMOS technology development.