DIFFERENTIAL BICMOS LOGIC-CIRCUITS - FAULT CHARACTERIZATION AND DESIGN-FOR-TESTABILITY

Merged Current Switch Logic (MCSL) and Differential Cascode Voltage Sw itch Logic (DCVSL) are two common structures for differential BiCMOS l ogic family, that have several potential applications in high-speed VL SI circuits. This paper studies the fault characterization of these Bi CMOS circuits. The impact of each possible single defect on the behavi or of the circuits is analyzed by simulation. A new class of faults wh ich is unique to differential circuits is identified and its testabili ty is assessed. We propose a design-for-testability method that facili tates testing of this class of faults. Two different realizations for this method are introduced. The impact of this circuit modification on the behavior of the circuit in normal mode is investigated.