PARALLEL CONTROLLER SYNTHESIS USING PETRI NETS

A system for synthesising synchronous parallel controllers is presente d. The system comprises a set of Petri net based CAD tools that have b een added to an existing sequential synthesis system. Modules dedicate d to the Petri net approach implement algorithms, which test the Petri net controller representation, provide an improved place encoding, an d realise a novel method of generating state transition graphs from Pe tri nets. The algorithms are based on a new method of constructing a r estricted reachability graph of a net. The system incorporates differe nt design approaches, and so enables a designer to choose a solution t hat meets the specific needs of a design best. Benchmark comparisons b etween Petri net originated designs and equivalent FSMs show that the former are considerably more efficient in terms of area and speed when designing highly parallel circuits.