DISTRIBUTED FAULT SIMULATION FOR SEQUENTIAL-CIRCUITS BY PATTERN PARTITIONING

The paper investigates distributed fault simulation by pattern partiti oning for sequential circuits. Simulation is done by making each distr ibuted machine perform fault-free simulation with preceding patterns a nd then perform fault simulation with its own patterns. The fault simu lation is accelerated since the number of patterns needed to be perfor med fault simulation for each machine is reduced by a factor of n, the number of machines, and the faults detected by any machine are droppe d through communication of the network. A superlinear speedup can be o btained because this method can automatically remove the Case 1 faults , which are time consuming faults and would be considered to be undete cted in the traditional three-valued fault simulation but are in fact truly detected. A mathematical model is also presented to predict the performance of the distributed fault simulation.