ESD RELIABILITY AND PROTECTION SCHEMES IN SOI CMOS OUTPUT BUFFERS

Citation
Ms. Chan et al., ESD RELIABILITY AND PROTECTION SCHEMES IN SOI CMOS OUTPUT BUFFERS, I.E.E.E. transactions on electron devices, 42(10), 1995, pp. 1816-1821
Citations number
22
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
ISSN journal
00189383
Volume
42
Issue
10
Year of publication
1995
Pages
1816 - 1821
Database
ISI
SICI code
0018-9383(1995)42:10<1816:ERAPSI>2.0.ZU;2-2
Abstract
The electrostatic discharge (ESD) protection capability of SOI CMOS ou tput buffers has been studied with Human Body Model (HEM) stresses. Ex perimental results show that the ESD voltage sustained by SOI CMOS buf fers is only about half the voltage sustained by the bulk NMOS buffers . ESD discharge current in a SOI CMOS buffer is found to be absorbed b y the NMOSFET alone. Also, SOI circuits display more serious reliabili ty problem in handling negative ESD discharge current during bi-direct ional stresses, Most of the methods developed for bulk technology to i mprove ESD performance have minimal effects on SOI. A new Through Oxid e Buffer ESD protection scheme is proposed as an alternative for SOI E SD protection, Zn order to improve ESD reliability, ESD protection cir cuitries can be fabricated on the SOI substrate instead of the top sil icon thin film, after selectively etching through the buried oxide. Th is scheme also allows ESD protection strategies developed for bulk tec hnology to be directly transferred to SOI substrate.