COST-EFFECTIVE NOVEL FLEXIBLE CELL-LEVEL SYSTOLIC ARCHITECTURE FOR HIGH-THROUGHPUT IMPLEMENTATION OF 2-D FIR FILTERS

Citation
Bk. Mohanty et Pk. Meher, COST-EFFECTIVE NOVEL FLEXIBLE CELL-LEVEL SYSTOLIC ARCHITECTURE FOR HIGH-THROUGHPUT IMPLEMENTATION OF 2-D FIR FILTERS, IEE proceedings. Computers and digital techniques, 143(6), 1996, pp. 436-439
Citations number
8
Categorie Soggetti
Computer Sciences","Computer Science Hardware & Architecture","Computer Science Theory & Methods
ISSN journal
13502387
Volume
143
Issue
6
Year of publication
1996
Pages
436 - 439
Database
ISI
SICI code
1350-2387(1996)143:6<436:CNFCSA>2.0.ZU;2-Q
Abstract
Recurrence relations and fully pipelined novel cell-level systolic arc hitectures are suggested for massively parallel implementation of two- dimensional FIR and linear phase FIR filters. Owing to the higher leve l of parallelism, the proposed structures would yield more throughput over the existing structures. Besides, it can be flexibly configured a ccording to the throughput requirement of the application for the chos en processor technology for cost-effective implementation.