PERFORMANCE OF THE 3-D PENCIL FLASH EPROM CELL AND MEMORY ARRAY

A promising new 3-D Programmable erasable nonvolatile cylindrical (PEN CIL) flash EPROM cell that offers significant area and performance adv antages over conventional planar approaches has been implemented in a novel memory array, The 3-D PENCIL cell is a vertical de,ice formed on the sidewalls of an etched silicon pillar, The cell is a single trans istor stacked gate structure with the floating gate and control gate c ompletely surrounding the pillar, Current hows vertically from the bit Line contact at the top of the pillar to the source lying at the bott om of the pillar, When implemented in a novel self-aligned array, the cell size approaches the square of the minimum pitch and has an area l ess than half that of the conventional NOR type structure, The cell an d array architecture also promise to be highly scalable. Experimental data reveals that the cells have up to 3x larger read current than com parable planar cells, are suitable for 5 V only operation and have fas t program and erase speeds at moderate voltage levels. Uniformity and endurance characteristics are also promising.