THE ELSA WAFER-SCALE INTEGRATION PROJECT

Authors
IVEY P
Citation
P. Ivey, THE ELSA WAFER-SCALE INTEGRATION PROJECT, IEEE transactions on components, hybrids, and manufacturing technology, 16(7), 1993, pp. 626-636
Citations number
16
Categorie Soggetti
Material Science","Engineering, Eletrical & Electronic
Journal title
IEEE transactions on components, hybrids, and manufacturing technology → ACNP
ISSN journal
01486411
Volume
16
Issue
7
Year of publication
1993
Pages
626 - 636
Database
ISI
SICI code
0148-6411(1993)16:7<626:TEWIP>2.0.ZU;2-F
Abstract
In this paper we outline some of the technology, successful and unsucc essful, of part of a large European project in wafer scale integration (WSI). The work described is an attempt to build a 64 by 64 array pro cessor on a 4-in wafer. Such a processor would have a computing power in excess of 10 billion operations per second. A test chip and a demon stration system, which achieves such a processing power, is also outli ned.