POLISHED TFTS - SURFACE-ROUGHNESS REDUCTION AND ITS CORRELATION TO DEVICE PERFORMANCE IMPROVEMENT

Chemical-mechanical polishing (CMP) has been applied to the fabricatio n of n-channel polysilicon thin film transistors (poly-Si TFT's), Thre e different polishing conditions are compared: 1) polishing before; 2) polishing after; and 3) both polishing before and after the a-Si recr ystallization. Devices with no polishing act as control samples. Exper iments consistently reveal that devices with post-anneal polishing exh ibit the best performance. Two-fold improvement of drain current is at tributed to the smoother active polysilicon surface, The electrical ch aracteristics of a post-anneal polished TFT in terms of held effect mo bility mu(FE), threshold voltage V-T, and subthreshold swing S can be further improved if hydrogenation is employed. It is also found that a large decrease in the poly-Si surface roughness leads to higher diele ctric breakdown strength and improved short-channel effects. Atomic fo rce microscopy (AFM) and transmission electron microscopy (TEM) result s are presented and correlated with electrical results.