AN 820 PIN PGA FOR ULTRALARGE-SCALE BICMOS DEVICES

A high pin count and high performance PGA has been developed for next- generation ASIC devices which apply half-micron BiCMOS technology and have a maximum usable gate count of 300k. This new package has been de signed with due consideration of all package functions, electrical, th ermal, and mechanical. A surface mount type pin joint was adopted to r ealize a high wiring density of the printed wiring board. This package has 820 pins with a 50 mil pitch, and 5 rows. A highly accurate tape automated bonding (TAB) technology was applied to the die assembly to achieve the narrow pitch and high pad count of the bonding between the die and the package. The thermal resistance from the die to the ambie nt is lower than. 1.5-degrees-C/W at 1 m/s air flow velocity. The elec trical parameters of the package were quantified. The measured cutoff frequency (-3 dB) was kept at 1.25 Ghz including the TAB lead. The ele ctrical characteristics of the package have realized a complete transm itted signal form above 50 MHz. The high reliability of the package an d surface mount type soldering has been confirmed from temperature-cyc ling tests and fatigue life estimation.