AN ALL-IMPLANTED, SELF-ALIGNED, GAAS JFET WITH A NONALLOYED W P+-GAASOHMIC GATE CONTACT/

Citation
Jc. Zolper et al., AN ALL-IMPLANTED, SELF-ALIGNED, GAAS JFET WITH A NONALLOYED W P+-GAASOHMIC GATE CONTACT/, I.E.E.E. transactions on electron devices, 41(7), 1994, pp. 1078-1082
Citations number
13
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
ISSN journal
00189383
Volume
41
Issue
7
Year of publication
1994
Pages
1078 - 1082
Database
ISI
SICI code
0018-9383(1994)41:7<1078:AASGJW>2.0.ZU;2-G
Abstract
We describe a self-aligned, refractory metal gate contact, enhancement mode, GaAs junction field effect transistor (JFET) where all impurity doping was done by ion implantation. Processing conditions are presen ted for realizing a high gate turn-on voltage (approximately 1.0 V at 1 mA/mm of gate current) relative to GaAs MESFET's. The high gate turn -on voltage is the result of optimizing the p+-gate implant and anneal to achieve a nonalloyed ohmic contact between the implanted p+-GaAs a nd the sputter deposited tungsten gate contact. Initial nominally 1.0 mum x 50 mum n-JFET's have a transconductance of 85 mS/mm and f(t) of 11.4 GHz.