CAPACITANCE-VOLTAGE CHARACTERISTICS OF METAL-INSULATOR-SEMICONDUCTOR DIODES WITH S-PASSIVATION AND SI INTERFACE CONTROL LAYERS ON GAAS AND INP

GaAs and InP surfaces have been prepared by gas-phase and liquid-phase polysulfide passivation techniques followed by the deposition of Si i nterface control layers (ICLs) by e-beam evaporation. For GaAs surface s, the performance of an ICL consisting of 1.5 nm Si on top of 0.5 nm of Ge has also been evaluated. Metal-insulator-semiconductor diodes wi th aluminum top electrodes were fabricated on these surfaces using sil icon nitride deposited by a remote plasma-enhanced chemical vapor tech nique or silicon dioxide deposited by a conventional direct plasma-enh anced chemical vapor deposition technique. The quality of the interfac es was analyzed by capacitance-voltage (C-V) measurements and the inte rface state densities D(it) were deduced from the C-V data using the h igh-low method. Values as low as 1.5 x 10(12) eV-1cm-2 were obtained f or polysulfide-passivated GaAs surfaces with a Ge-Si or Si ICL, the lo west ever demonstrated using the high-low method for an ex-situ techni que not involving GaAs epitaxy. For InP, the Si ICL does not reduce D( it) below that of 2 x 10(12) eV-1cm2 that was obtained for the polysul fide passivated surface. The Si ICL produces an interface that degrade s more slowly on exposure to air for both GaAs and InP.