J. Vanhoudt et al., A 5 V-COMPATIBLE FLASH EEPROM CELL WITH MICROSECOND PROGRAMMING TIME FOR EMBEDDED MEMORY APPLICATIONS, IEEE transactions on components, packaging, and manufacturing technology. Part A, 17(3), 1994, pp. 380-389
This paper presents a split-gate Flash EEPROM cell that relies on enha
nced hot-electron injection onto the floating gate for fast 5 V-only p
rogramming. The device is referred to as the High Injection MOS (or HI
MOS) cell and is fabricated in a 0.7-mum double polysilicon CMOS techn
ology with minor additions to the standard CMOS process flow. The cell
has been optimized for a virtual ground array configuration in order
to shrink the area down to the range of 10-20 mum2 per bit. An extensi
ve study is presented of the influence of applied programming voltages
and device geometry on cell performance. It is shown that, for a cell
area of 16.5 mum2, microsecond programming can be achieved with a pro
gram-gate voltage of 12 V and 5 V-only operation. Furthermore, during
programming the unique features of the HIMOS cell result in very low d
rain current (approximately 25 muA per cell for 5 V-only operation) an
d a correspondingly low power consumption. It is shown experimentally
that the combination of high programming efficiency with low power con
sumption indicates that 3.3 V-only operation is already viable in 0.7-
mum technology. In addition, a detailed study of the various possible
disturb effects confirms the reliability of the HIMOS technology, and
the feasibility of using a virtual ground array for this memory cell.