HIGHER DENSITY USING DIFFUSION PATTERNED VIAS AND FINE-LINE PRINTING

This paper discusses design guidelines, process steps, and test result s from fabricating two 40-mm MCM-Cs using the latest thick film materi als and printing techniques. The two line interface controller (LIC) m odules have been designed with two large ASIC's (plus memory) and prot otyped using thick film gold conductors with 3-mil line/space and 6-mi l via criteria. The second prototype of the LIC module utilized silver conductors at 5-mil line and gap to further reduce cost. The second m odule design is using more bare die (field programmable gate arrays an d memory) for a much higher interconnect density but is still using ex isting design guidelines. It is believed that 4-mil vias are achievabl e in production and will be developed for future designs requiring hig her density. Diffusion patterning allows a 50% reduction (4-6 mil) in via size versus traditional printed vias (10-20 mil). In combination w ith fine-line printing, higher interconnect density is achievable than with conventional thick film processing. Fine-line printing improveme nts are a result of selecting state of the art meshes and emulsions in combination with special preparations, allowing unusually good track width reduction and excellent line definition.