RIE LAG IN HIGH-ASPECT-RATIO TRENCH ETCHING OF SILICON

Citation
H. Jansen et al., RIE LAG IN HIGH-ASPECT-RATIO TRENCH ETCHING OF SILICON, Microelectronic engineering, 35(1-4), 1997, pp. 45-50
Citations number
15
Categorie Soggetti
Optics,"Physics, Applied","Engineering, Eletrical & Electronic
Journal title
ISSN journal
01679317
Volume
35
Issue
1-4
Year of publication
1997
Pages
45 - 50
Database
ISI
SICI code
0167-9317(1997)35:1-4<45:RLIHTE>2.0.ZU;2-5
Abstract
While etching high aspect ratio trenches into silicon with reactive io n etching (RIE) using an SF6/O-2 chemistry it is observed that the etc h rate is depending on the mask opening. This effect is known as RIE l ag and is caused by the depletion of etching ions and radicals or inhi biting neutrals during their trench passage. In order to decide which source is the main cause, we constructed special ''horizontal trenches '' where only radicals are controlling the etching. The experiment sho wed that radicals are not responsible for RIE lag. Inhibitor depletion will result in inverse RIE lag. This effect is not found during our e xperimentation which leaves us with ion depletion to explain RIE lag. Depletion of ions is caused by ions captured by the sidewalls due to t he angular distribution of incoming ions into the trench opening and t he deflection of ions in the trench due to electrostatic fields. The a nalysis given in this paper indicates that the influencing field cause s ion deflection, ion depletion, and therefore RIE lag in micron-sized Si trenches for low-energetic ions. In all cases, thus independent of the feature size, the angular distribution of incoming ions is though t to have a major contribution to RIE lag at higher pressures. These p henomena will be treated theoretically and simulated using a program, written in c++ under windows, in order to give a quantitative analysis of RIE lag.