FABRICATION AND CHARACTERIZATION OF SIGE BASED IN-PLANE-GATE TRANSISTORS

We present an in-situ technology for fabrication of barrier structures in modulation-doped Si/SiGe in-plane-gate (IPG) transistors. A specia l multilayer-resist system is developed for pattern transfer by electr on-beam lithography (EBL) and anisotropic SF6/O-2 dry etching. Barrier s are realized by etch-trenches cutting the two dimensional electron g as (2DEG). The trenches are filled up with a low temperature remote pl asma enhanced chemical vapour deposition (RPECVD) of silicondioxide (S iO2). Dry-etching and passivation are done in-situ to avoid contaminat ion. IPG transistors with different geometric dimensions have been fab ricated and electrically characterised. Transistor operation is demons trated up to T=77 K. The breakdown voltage and the depletion length of the devices are estimated. The obtained data indicate the advantage o r tile presented in-situ technology in comparison to other fabrication techniques.