DUAL-GATE NANOSTRUCTURED SILICON MOSFETS - FABRICATION AND LOW-TEMPERATURE CHARACTERIZATION

Authors
DEGRAAF C CARO J HEYERS K RADELAAR S
Citation
C. Degraaf et al., DUAL-GATE NANOSTRUCTURED SILICON MOSFETS - FABRICATION AND LOW-TEMPERATURE CHARACTERIZATION, Microelectronic engineering, 21(1-4), 1993, pp. 405-408
Citations number
NO
Categorie Soggetti
Optics,"Physics, Applied","Engineering, Eletrical & Electronic
Journal title
Microelectronic engineering → ACNP
ISSN journal
01679317
Volume
21
Issue
1-4
Year of publication
1993
Pages
405 - 408
Database
ISI
SICI code
0167-9317(1993)21:1-4<405:DNSM-F>2.0.ZU;2-7
Abstract
We describe a new process for the fabrication of dual-gate silicon met al-oxide-semiconductor field-effect transistors (MOSFETs), in which a second, nanostructured gate is incorporated in the insulating layer be tween substrate and upper, planar gate. The process is especially desi gned to fabricate dual-gate MOSFETs for quantum transport studies, of which examples are given.