APPLICATION OF A FLOATING WELL CONCEPT TO A LATCH-UP-FREE, LOW-COST, SMART POWER HIGH-SIDE SWITCH TECHNOLOGY

Citation
M. Bafleur et al., APPLICATION OF A FLOATING WELL CONCEPT TO A LATCH-UP-FREE, LOW-COST, SMART POWER HIGH-SIDE SWITCH TECHNOLOGY, I.E.E.E. transactions on electron devices, 40(7), 1993, pp. 1340-1342
Citations number
3
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
ISSN journal
00189383
Volume
40
Issue
7
Year of publication
1993
Pages
1340 - 1342
Database
ISI
SICI code
0018-9383(1993)40:7<1340:AOAFWC>2.0.ZU;2-N
Abstract
The aim of this brief is to present an original design methodology tha t permits implementing latch-up-free smart power circuits on a very si mple, cost-effective technology. The basic concept used for this purpo se is letting float the wells of the MOS transistors most susceptible to initiate latch-up.