M. Bafleur et al., APPLICATION OF A FLOATING WELL CONCEPT TO A LATCH-UP-FREE, LOW-COST, SMART POWER HIGH-SIDE SWITCH TECHNOLOGY, I.E.E.E. transactions on electron devices, 40(7), 1993, pp. 1340-1342
The aim of this brief is to present an original design methodology tha
t permits implementing latch-up-free smart power circuits on a very si
mple, cost-effective technology. The basic concept used for this purpo
se is letting float the wells of the MOS transistors most susceptible
to initiate latch-up.