A 64-GHZ F(T) AND 3.6-V BV(CEO) SI BIPOLAR-TRANSISTOR USING IN-SITU PHOSPHORUS-DOPED AND LARGE-GRAINED POLYSILICON EMITTER CONTACTS

Authors
NANBA M UCHINO T KONDO M NAKAMURA T KOBAYASHI T TAMAKI Y TANABE M
Citation
M. Nanba et al., A 64-GHZ F(T) AND 3.6-V BV(CEO) SI BIPOLAR-TRANSISTOR USING IN-SITU PHOSPHORUS-DOPED AND LARGE-GRAINED POLYSILICON EMITTER CONTACTS, I.E.E.E. transactions on electron devices, 40(8), 1993, pp. 1563-1565
Citations number
12
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
Journal title
I.E.E.E. transactions on electron devices → ACNP
ISSN journal
00189383
Volume
40
Issue
8
Year of publication
1993
Pages
1563 - 1565
Database
ISI
SICI code
0018-9383(1993)40:8<1563:A6FA3B>2.0.ZU;2-V
Abstract
A high-performance bipolar transistor has been developed using an In-s itu phosphorus-Doped Polysilicon (IDP) technique for emitter formation . The transistor demonstrated an ultra-high current gain of 700, a max imum cutoff frequency f(T(max)) of 64 GHz, and a breakdown voltage bet ween collector and emitter BV(CEO) of 3.6 V. At the conditions of a V( CE) Of 2 and 3 V, the product of f(T(max)) and BV(CEO) of 200 GHz . V has been accomplished. This value is nearly equal to the physical limi tation for homojunction silicon transistors [1].