IMPLICATIONS OF A LOCALIZED DEFECT MODEL FOR WAFER LEVEL RELIABILITY MEASUREMENTS OF THIN DIELECTRICS

Citation
P. Osullivan et A. Mathewson, IMPLICATIONS OF A LOCALIZED DEFECT MODEL FOR WAFER LEVEL RELIABILITY MEASUREMENTS OF THIN DIELECTRICS, Microelectronics and reliability, 33(11-12), 1993, pp. 1679-1685
Citations number
4
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00262714
Volume
33
Issue
11-12
Year of publication
1993
Pages
1679 - 1685
Database
ISI
SICI code
0026-2714(1993)33:11-12<1679:IOALDM>2.0.ZU;2-5
Abstract
In this paper a simple model of an oxide defect as a region of localis ed oxide thinning is used to explore the relationship between the most commonly used measurements of dielectric reliability. For each measur ement it shows how the measured parameters depend on the area and effe ctive thickness of the defect. The work shows that in constant voltage and ramped voltage stress the area and thickness of the defect may be easily separated in the measured parameters. However, in constant cur rent and ramped current measurements all measured parameters are depen dent on both area and thickness which makes the extraction of area and thickness more difficult. it is shown that, in order to be able to pr oject from one measurement to any other, the defect area and thickness must be determined. In particular, if projections of charge to breakd own are required then the use of a model which only includes defect th inning as proposed by Lee et al, [1], is not sufficient.