The system-level design process typically involves refining a design s
pecification down to the point where each of the system's components i
s described as a block diagram or netlist of abstract Register-Transfe
r (RT) level components. In this paper, we motivate the need for such
a standard RT component set, and describe a library environment that s
upports automatic model generation, design reuse, and synthesis with t
echnology-specific estimators. We demonstrate the efficacy of the stan
dard RT-component set approach with experiments performed on the HLSW9
2 benchmarks. Our preliminary results indicate only a small overhead o
f about 10% in using these standard, generic components. We then descr
ibe an automatic model generation and technology projection scheme tha
t uses fast (on-line) estimators for predicting the area and delay of
generic RT components tuned to a particular technology library with an
accuracy of 10%. These model generators and estimators have been inte
grated with a high-level synthesis system at U.C. Irvine.