EMBEDDED POWER-SUPPLY FOR LOW-POWER DSP

The use of dynamically adjustable power supplies as a method to lower power dissipation in DSP is analyzed, Power can be reduced substantial ly without sacrificing performance in fixed-throughput applications by slowing the clock and lowering supply voltage instead of idling when computational workload varies. This can yield a typical power savings of 30-50%, If latency can be tolerated, buffering data and averaging p rocessing rate can yield power reductions of an order of magnitude in some applications, Continuous variation of the supply voltage can be a pproximated by very crude quantization and dithering: a four-level con troller is sufficient to get within a few percent of the optimal power savings, Significant savings are possible only if the voltage can be changed on the same time scale as the variations in workload, A chip h as been fabricated and tested to verify the closed-loop functionality of a variable voltage system. The controller takes only 0.4 mm(2) and draws a maximum of 1 mW at 2 V with a 40 MHz clock, The control framew ork developed is applicable to generic DSP applications.