MODELING AND SIMULATION OF ASYMMETRIC STRIPLINE FOR MULTICHIP-MODULE APPLICATIONS

Citation
Sd. Lopatin et al., MODELING AND SIMULATION OF ASYMMETRIC STRIPLINE FOR MULTICHIP-MODULE APPLICATIONS, Microelectronic engineering, 37-8(1-4), 1997, pp. 173-178
Citations number
7
Journal title
ISSN journal
01679317
Volume
37-8
Issue
1-4
Year of publication
1997
Pages
173 - 178
Database
ISI
SICI code
0167-9317(1997)37-8:1-4<173:MASOAS>2.0.ZU;2-D
Abstract
Modeling and simulation of interconnect materials has become critical to the success of high performance ULSI, packaging, and multilayer sch emes for multichip modules. Computer simulation of the characteristic impedance Z (Ohms), capacitance C (pF), working frequency f (MHz) of A l asymmetric stripline filled with anodic Al oxide with dielectric con stants 4 and 6.6 for multilayer schemes in a hybrid multichip module w ere conducted. A RLC-model of the frequency of Al transmission lines w as successfully used. Using conformal mapping, the functional dependen ce of the characteristic impedance and working frequency on the capaci tance of the Al stripline filled by anodic Al oxide can be determined. The results are valid for high frequencies. To evaluate this model an d characterize its performance with high speed electrical multichip mo dule design, a test cell using a multilayer interconnect structure Al/ anodic Al oxide on an Al substrate was developed.